Performance Counter tools do not work correctly for Intel Family 6 Model 29 processors
State
10-Fix Delivered (Fix available in build)
Category:Subcategory
kernel:cpc
Keywords
SFO
Responsible Engineer
Kuriakose Kuruvilla
Reported Against
Duplicate Of
Introduced In
solaris_nevada
Commit to Fix
snv_109
Fixed In
snv_109
Release Fixed
solaris_nevada(snv_109)
Related Bugs
Submit Date
1-October-2008
Last Update Date
25-February-2009
Description
The Performance Counter BackEnd (pcbe) for older Intel Pentium processors is loaded on machines with Intel processors of Family 6 Model 29. These processors are of the Penryn family and the pcbe should provide the same functionality as that of the Family 6 Model 15 and Model 23 processors.
# cpustat -h
Usage:
cpustat [-c events] [-p period] [-nstD] [interval [count]]
-c events specify processor events to be monitored
-n suppress titles
-p period cycle through event list periodically
-s run user soaker thread for system-only events
-t include tsc register
-D enable debug mode
-h print extended usage information
Use cputrack(1) to monitor per-process statistics.
CPU performance counter interface: Pentium Pro with MMX, Pentium II
event specification syntax:
[picn=]<eventn>[,attr[n][=<val>]][,[picn=]<eventn>[,attr[n][=<val>]],...]
event[0-1]: data_mem_refs dcu_lines_in dcu_m_lines_in dcu_m_lines_out
dcu_miss_outstanding ifu_ifetch ifu_ifetch_miss itlb_miss
ifu_mem_stall ild_stall l2_ifetch l2_ld l2_st l2_lines_in
l2_lines_out l2_m_lines_inm l2_m_lines_outm l2_rqsts
l2_ads l2_dbus_busy l2_dbus_busy_rd bus_drdy_clocks
bus_lock_clocks bus_req_outstanding bus_tran_brd
bus_tran_rfo bus_trans_wb bus_tran_ifetch bus_tran_inval
bus_tran_pwr bus_trans_p bus_trans_io bus_tran_def
bus_tran_burst bus_tran_any bus_tran_mem bus_data_rcv
bus_bnr_drv bus_hit_drv bus_hitm_drv bus_snoop_stall flops
fp_comp_ops_exe fp_assist mul div cycles_div_busy
ld_blocks sb_drains misalign_mem_ref inst_retired
uops_retired inst_decoder hw_int_rx cycles_int_masked
cycles_int_pending_and_masked br_inst_retired
br_miss_pred_retired br_taken_retired
br_miss_pred_taken_ret br_inst_decoded btb_misses br_bogus
baclears resource_stalls partial_rat_stalls
segment_reg_loads cpu_clk_unhalted mmx_instr_exec
mmx_sat_instr_exec mmx_uops_exec mmx_instr_type_exec
fp_mmx_trans mmx_assists mmx_instr_ret seg_rename_stalls
seg_reg_renames ret_seg_renames
attributes: noedge pc inv int umask cmask nouser sys
See Appendix A.3 of the "IA-32 Intel Architecture Software
Developer's Manual Volume 3: System Programming Guide," Order #
245472-012, 2003
#
# modinfo -w | grep pcbe
183 fffffffff8471000 2b40 - 1 pcbe.GenuineIntel.6 (Pentium Performance Counters)
#
Work Around
The following workaround is available on Solaris Nevada builds 100 and newer.
For the 64-bit pcbe...
$ cd /usr/kernel/pcbe/amd64
$ ln pcbe.GenuineIntel.6.15 pcbe.GenuineIntel.6.29
Similarly for the 32-bit pcbe...
$ cd /usr/kernel/pcbe
$ ln pcbe.GenuineIntel.6.15 pcbe.GenuineIntel.6.29
If the pcbe module has already been loaded ("modinfo -w | grep pcbe" should indicate if it has), a reboot will be required for the new pcbe to take effect.
The workaround has the following limitation.
The list of event strings that can be passed for pic0 and pic1 is incorrect listed.
For example, cpustat says...
# cpustat -h
Usage:
cpustat [-c events] [-p period] [-nstD] [interval [count]]
-c events specify processor events to be monitored
-n suppress titles
-p period cycle through event list periodically
-s run user soaker thread for system-only events
-t include tsc register
-D enable debug mode
-h print extended usage information
Use cputrack(1) to monitor per-process statistics.
CPU performance counter interface: Intel Arch PerfMon v2 on Family 6 Model 29
event specification syntax:
[picn=]<eventn>[,attr[n][=<val>]][,[picn=]<eventn>[,attr[n][=<val>]],...]
event0: cpu_clk_unhalted.thread_p inst_retired.any_p
cpu_clk_unhalted.ref_p longest_lat_cache.reference
longest_lat_cache.miss br_inst_retired.all_branches
br_misp_retired.all_branches
event1: cpu_clk_unhalted.thread_p inst_retired.any_p
cpu_clk_unhalted.ref_p longest_lat_cache.reference
longest_lat_cache.miss br_inst_retired.all_branches
br_misp_retired.all_branches
event2: inst_retired.any
event3: cpu_clk_unhalted.thread
event4: cpu_clk_unhalted.ref
attributes: edge pc inv umask cmask nouser sys
See Appendix A of the "Intel 64 and IA-32 Architectures Software
Developer's Manual Volume 3B: System Programming Guide, Part 2"
Order Number: 253669-026US, Februrary 2008
#
The events strings "cpu_clk_unhalted.thread_p inst_retired.any_p cpu_clk_unhalted.ref_p longest_lat_cache.reference longest_lat_cache.miss br_inst_retired.all_branches br_misp_retired.all_branches" listed for pics 0 and 1 will not be accepted.
# cpustat -c cpu_clk_unhalted.thread_p
time cpu event pic0
cpustat: Unknown event
cpustat: Unknown event
cpustat: Unknown event
cpustat: cpustat: Unknown event
cpustat: Unknown event
...[OUTPUT TRUNCATED]...
cpustat: cpustat: Unknown event
cpustat: Unknown event
Unknown event
cpustat: cpu3 - Invalid argument
cpustat: cpu0 - Invalid argument
0.015 6 total 0
#
pics 0 and 1 can be programmed using hardcoded event values. For example, to get counts for the event inst_retired.any, use the following cpustat command
# cpustat -c pic0=0xc0,umask0=0 1 1
time cpu event pic0
1.012 5 tick 11762
1.012 3 tick 26836
...[OUTPUT TRUNCATED]...
1.024 0 tick 20120
1.024 4 total 2657152
#
The fixed-function counters in pics 2-4 will accept the event strings as expected.
For example,
# cpustat -c inst_retired.any
time cpu event pic2
5.008 0 tick 35718
5.008 1 tick 32724
5.008 2 tick 23247
5.008 5 tick 28053
5.008 4 tick 57435
5.019 3 tick 28099
#