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Bug ID 6661255
Synopsis Incorrect disassembly for SSE4.x instructions under S11 build 79 and 80
State 10-Fix Delivered (Fix available in build)
Category:Subcategory utility:dis
Keywords
Responsible Engineer Kuriakose Kuruvilla
Reported Against
Duplicate Of
Introduced In solaris_nevada
Commit to Fix snv_85
Fixed In snv_85
Release Fixed solaris_nevada(snv_85) , solaris_10u6(s10u6_01) (Bug ID:2161180)
Related Bugs 6563039
Submit Date 9-February-2008
Last Update Date 8-May-2008
Description
1. Using Intel ICC to compile to generate .s file:

   icc -S -xT x3.c

We have in the .s file:

       movl      %eax, i(%rip)                                 #9.2
       pextrb    $3, %xmm0, %edx                               #10.6
       addl      %edx, %eax

But if we compile to generate .o file,  the disassembler shows:

   foo+0x10:               89 05 00 00 00 00  movl   %eax,+0x0(%rip)   <foo+0x16>
   foo+0x16:               66 0f 3a 14 c2 03  pextrb $0x3,%xmm2,%eax
   foo+0x1c:               03 c2              addl   %edx,%eax

2. The second problem is actually just a problem on my part of pointing at the wrong libdisasm.so.  Please ignore this part.
Also, instructions PINSRD and PEXTRD are incorrectly disassembled as PINSRL and PEXTRL respectively.
Work Around
N/A
Comments
N/A