CPU power management policies and mechanisms have historically been quite decoupled from the scheduler/dispatcher. On multi-processor (and espeically CMT based) systems, this lack of integration leads to overall loss of performance as the dispatcher unknowingly schedules threads to run on low power/performance CPUS, and reduced power efficiency as migration / load balancing policies limit the duration and extent of processor quiescence.
This RFE seeks to bring CPU power awareness to the dispatcher, such that processor power states can be factored into various thread placement strategies.
For additional information, please see:
http://www.opensolaris.org/os/project/tesla/Work/CPUPM
.