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Bug ID 6537876
Synopsis xmm register save for kernel threads
State 4-Defer (Accepted, but the fix may not be made soon.)
Category:Subcategory kernel:amd64
Keywords SFO
Responsible Engineer Konstantin Ananyev
Reported Against
Duplicate Of
Introduced In
Commit to Fix
Fixed In
Release Fixed
Related Bugs 6767618 , 6226737
Submit Date 22-March-2007
Last Update Date 22-February-2009
Description
Deleted text placed here by mistake.
Implement a mechanism to save kernel thread xmm register state during thread
context switch.  The solution should only save the xmm register state of
kernel threads using xmm registers to avoid slowing down the majority of
kernel threads which do not use xmm.  Some investigation and requirements
gathering is needed.

Solaris cryptography and compression may have significant performance
benefits using xmm registers.

Solaris may need this to incorporate open-source compression and cryptography
code using xmm registers.  There are places where code run in kernel and
useland use different source due to the lack of xmm register context saving
in kernel threads.
Work Around
One workaround is to disable preemption in the kernel around %xmm* register usage.

From usr/src/common/bignum/i386/bignum_i386.c
Use kpreempt_disable() and kpreempt_enable() in disp.h

1. Define this in a .c file (rename kpr_*able() functions for uniqueness):

#if defined(_KERNEL)
#include <sys/disp.h>
void
kpr_disable(void)
{
	kpreempt_disable();
}

void
kpr_enable(void)
{
	kpreempt_enable();
}
#endif


2. Use the above in .s assembly:

#ifdef _KERNEL
.extern	kpr_disable
.extern	kpr_enable
#define	KPREEMPT_DISABLE	call	kpr_disable
#define	KPREEMPT_ENABLE		call	kpr_enable
#else
#define	KPREEMPT_DISABLE
#define	KPREEMPT_ENABLE
#endif

	KPREEMPT_DISABLE
	/ . . . function code block using %xmm registers . . .
	KPREEMPT_ENABLE
Comments
This is required to use the Intel AES-NI instruction set to optimize AES in the kernel (see CR 6767618). SSE state (%xmm* registers) are saved iand restored in userland, but not by kernel threads.  See workaround.