OpenSolaris

This bug only effects system which support Deep C-states, such as Intel Core I7.

Idle CPUs enter C1 halt state 100% of the time they go idle if an ACPI C2 state
was not enumerated in the ACPI _CST object.  ACPI C3 state should still be
considered when C2 does not exist.  The system never chooses C3 when C2 does not
exist.

The system will not save power by enterring C3 idle state.  Performance is not
impacted because C1 is a higher performance idle state.

This only occurs when ACPI does not enumerate a C2 state in the _CST object.
This has only been seen by disabling the ACPI C2 state in BIOS.
However future processors may not support a C2 state.

This issue can be worked around on our test system by enabling the C2 state
in the Advanced CPU Configuration section of BIOS before booting Solaris.



Evaluation:

Solaris initializes a cma_c_state_t structure for each CPU when Deep C-states
are enabled.  The cs_C2_latency and cs_C3_latency fields are populated
for ACPI _CST data.  These fields are initialized to a large value when
latency data is not available for that state.  CPUs use cpupm_next_cstate()
to decide which idle state to enter.  The algorithm assumes C2 has less
latency than C3.  The default value for C2 is large enough that C2 is never
selected.  The algorithm never considers C3 because C2 is not acceptable.

A fix is to make cpupm_next_cstate() aware of missing C-states.
This was bugzilla bug:
http://defect.opensolaris.org/bz/show_bug.cgi?id=6708
Webrev is here:
	http://cr.opensolaris.org/~bholler/6807891wr/index.html

hg pdiffs are attached in file "my_pdiffs".

If C2 has been disabled in BIOS, enable C2 in BIOS.

N/A